본문
[DigitalDesign Engineer]- 시니어급, 10년 이상자 선호
Primary Job Responsibilities/Duties*:
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1. Focus exclusively on digital IC design jobs
from frontend digital RTL design, synthesis and implementation, to digital
physical/backend design and DFT(design for test) jobs.
2. Cover analog/mixed signal IC design, IC verification, FPGA, analog layout,
physical design, CAD, EDA, PDK and semiconductor process, test and
qualification.
3.Experience taking custom projects from feasibility, process technology
selection, die size estimation, schedule management, IC design, floor-plan,
layout supervision and verification, tape-out procedure and fab monitoring,
ATE correlation, hands-on lab evaluation, RTM, yield improvement, and failure
analysis support.
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Other (Secondary) Job Duties:
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1. Excellent interpersonal, communication and
presentation skills with effectively concise technical documentation.
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Qualifications (Academic, Experience, Skills,
etc.)*:
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1. The ideal candidate will have 10+ years of
digital IC design experience.
2. Co-work experience with analog/mixed signal IC design/layout engineers is
quite emphasized.
3. Good English communication skill is preferable.
[Analog Design Engineer]- 주니어급 사원대리급 선호, 10년 이하 |
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Overall Purpose of Position*:
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1. Diversification for DrMOS and SPS business
line-up.
2. Design resource for simulation, evaluation and product testability.
3. Extend new business platforms like HV DC-DC, Hot Swap, POL, etc.
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Primary Job Responsibilities/Duties*:
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1.Understanding of transistor-level analog
design fundamentals, design tools and methodologies.
2.Understanding of semiconductor device physics, ESD, latch-up and
reliability design rules.
3.Preparable experience taking custom projects from feasibility, process
technology selection, die size estimation, schedule management, IC design,
floor-plan, layout supervision and verification, tape-out procedure and fab
monitoring, ATE correlation, hands-on lab evaluation, RTM, yield improvement,
and failure analysis support.
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Other (Secondary) Job Duties:
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1. Good interpersonal, communication and
presentation skills with effectively concise technical documentation.
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Qualifications (Academic, Experience, Skills,
etc.)*:
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1. From Graduate up to analog/mixed IC design
career less than 10 years.
2. Good English communication skill is prefferable.
3. Active team building and innovative spirit are emphasized.
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[Layout Engineer]- 주니어급 사원대리급 선호, 10년 이하
Overall Purpose of Position*:
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1. Diversification for DrMOS and SPS business
line-up.
2. Layout resource for new business product platforms.
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Primary Job Responsibilities/Duties*:
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1.This individual must be a self-starter and
exhibit clear verbal and nonverbal communication skills.
2.The candidate must demonstrate a strong ability to debug problems, find
effective solutions, and negotiate with the engineering staff.
3.The candidate must demonstrate a high level of technical competence.
4.Will interact with the Engineering staff to create any of the layout blocks
from schematics and verify the integrity of the data.
5.Must have strong skills in layout and floor planning skills and manual
routing.
6.Willing to learn and understand design rules and deliver quality layout.
7.Lead role in major block developments.
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Other (Secondary) Job Duties:
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Qualifications (Academic, Experience, Skills,
etc.)*:
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1. The ideal candidate will have less than 10
years of analog layout experience.
2. Co-work experience with analog/mixed signal IC design engineers is quite
emphasized.
3. Positive team building and innovative spirit are preferable.
근무지: 판교 이노벨리
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